In response to the increased demand for computing across various applications, there is a growing effort in both classical and alternative computing. Quantum Computers (QCs), which operate using qubits capable of being simultaneously in two states (e.g., |0> and |1>), have the potential to execute certain algorithms faster than classical computing. Consequently, the fusion of classical and quantum computing holds great promise for the future of computing.
A superconducting transmon stands out as one of the promising qubit candidates for scaled Quantum Computing (QC) systems. This is due to the ability to tailor the state of the artificial atom using radiofrequency (RF) pulses in the range of 4 to 6 GHz for state manipulation. To mitigate the impact of thermal noise on operation, these transmons are placed at a few millikelvins (mK) in a dilution refrigerator and are controlled by classical electronics connected with long cables from a rack-mounted system at room temperature (RT).
However, providing a control line for every qubit from RT to a 10 mK environment for a 106-qubit system seems impractical. This is due to various factors, including RF loss, cross-talk, heat load, and mechanical congestion of the wires.
These factors would inevitably result in an input-output (I/O) bottleneck. To scale up Quantum Computers to millions of qubits, cryogenic electronics based on complementary metal-oxide-semiconductor (CMOS) technology may offer a
scalable and reliable solution to overcome the I/O bottleneck.
Our objective is to provide a straightforward estimation of CMOS circuit performance without the reformulation of the model. Whenever feasible, we have just re-optimized parameters within the existing model to align them with real measurements extracted at 4.2K. In addition to the MOS transistor characteristics, it is necessary to consider back end of the line (BEOL) characteristics that depend on technology nodes and operating temperature. Understanding of BEOL characteristics, such as interconnect and via resistances as well as interline capacitances, remains inadequate at cryogenic temperatures. For dielectrics, a thermal conductivity is known to decrease with temperature. A careful evaluation is required to understand the Joule heating effect (JHE) on BEOL.
To tackle the above issues, we are joining the JST Moonshot Project goal 6.
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